1. Field of the Invention
The present invention relates to user-programmable circuits. More specifically, the present invention relates to antifuse elements for use in such circuits and to methods for programming such antifuse elements. In particular, the present invention relates to methods for minimizing the disturbance to already programmed antifuses caused by subsequent programming of other antifuses.
2. The Prior Art
Antifuses, such as those disclosed in U.S. Pat. Nos. 4,823,181 and 4,899,205 are programmed using known methods. In addition, such antifuses disposed in circuit architectures such as disclosed in U.S. Pat. No. 4,758,745 may be programmed by known methods. Co-pending application Ser. No. 381,630, filed Jul. 19, 1989, now U.S. Pat. No. 5,008,855, and co-pending application Ser. No. 07/523,978, entitled Method of Reducing Antifuse Resistance During Programming, filed May 16, 1990, commonly owned with the instant application, disclose methods for programming such antifuses in such circuit architectures. These applications and patents are hereby incorporated by reference as if fully set forth.
The process of programming a given one of a plurality of antifuses within a single integrated circuit may "disturb" one or more previously programmed antifuses in the same circuit, i.e., affect the previously-programmed antifuse or antifuses in a manner which raises their on resistance. The effect of raising on resistance of antifuses by disturbing one or more antifuses in a circuit while programming others may seriously degrade the performance of the circuit of which the disturbed antifuse is a part.
An object of the invention is to eliminate or reduce the adverse effects of disturb cycles in antifuse programming sequence. The techniques of the present invention may be used in programming antifuses in a field-programmable gate array (FPGA) architecture.